Hong Kong SAR
Digital, Information Technology (IT)
Investment Bank
Job Reference #
328236BR
City
Hong Kong SAR
Job Type
Full Time
Your role
Join a high-performance team building ultra-low latency trading systems. You’ll design and implement Algorithmic Trading solutions using a hybrid of high-performance C++ and FPGA hardware, enabling deterministic execution and rapid interaction with the markets.
We're looking for someone to/is:
design and Implement Algorithmic Trading solutions for Low Latency using C++ and FPGA.
architect solutions to achieve Low-Latency Networking using Kernel Bypass techniques.
interface C++ applications with FPGA hardware for real-time orchestration.
Hands-on engineer who thrives in fast-paced environments; Performance-obsessed and precision-driven.
self-motivated with a passion for solving complex technical challenges.
analyze requirements and design and implement solutions in an agile iterative way.
analyze system performance and resolve latency bottlenecks.
increase automated testing including simulation and verification frameworks to achieve continuous delivery and reliability.
ensure that enterprise requirements on cyber-security, platform hosting and application monitoring and logging are met.
collaborate with the other Dev Teams, Quants, Product, and the Trading Desk.
provide Level 3 support for production systems.
Your Career Comeback
We are open to applications from career returners. Find out more about our program on ubs.com/careercomeback.
Your team
You’ll be part of the Development Team in Execution Services reporting into the Front Office Product organization, delivering latency-sensitive infrastructure for Algorithmic Execution, Smart Order Routing, Internalization, and Real-time Controls across Global Markets.
Your expertise
Degree in Computer Science, Electrical Engineering, or related field.
7+ years in Low Latency C++ and FPGA (Verilog/VHDL).
expert in C++17/20/23, Linux system programming, concurrency.
deep knowledge of FPGA toolchains (Vivado, Quartus), timing closure and able to drive full FPGA design flow (synthesis, place \& route, timing closure).
architect cycle-accurate FPGA designs and high-speed network interfaces.
experience with high-speed networking and hardware acceleration.
strong background in shared memory IPC and lock-free systems.
experience in Algo Trading \& SOR Development is expected.
familiarity with Market Microstructure and Trading Protocols (FIX, ITCH) is a plus.
#LI-HK
EFC-UBS
About us
Expert advice. Wealth management. Investment banking. Asset management. Retail banking in Switzerland. And all the support functions. That's what we do. And we do it for private and institutional clients as well as corporations around the world.
We are about 60,000 employees in all major financial centers, in more than 50 countries. Do you want to be one of us?
Join us
We're a truly global, collaborative and friendly group of people. Having a diverse, inclusive and respectful workplace is important to us. And we support your career development, internal mobility and work-life balance. If this sounds interesting, apply now.
Contact Details
UBS Business Solutions SA
UBS Recruiting
Disclaimer / Policy statements
UBS is an Equal Opportunity Employer. We respect and seek to empower each individual and support the diverse cultures, perspectives, skills and experiences within our workforce.